On May 28th, well-known analyst Ming-Chi Kuo from TF International Securities dropped a fresh industry report: out of all the custom ASIC (application-specific integrated circuit) players out there, MediaTek looks like the most promising strategic partner for Tesla’s ultra chip factory, TERAFAB. MediaTek would fully support the ramp-up of Intel’s 14A advanced process and advanced packaging, with small-volume chip deliveries possibly starting as early as 2028—exactly what Musk’s IC design team needs.
Kuo believes this potential tie-up could seriously boost TERAFAB’s execution speed, while also lifting MediaTek’s position and value in the AI ASIC space.
Back in March, Musk officially unveiled TERAFAB in Austin, Texas—a joint project by Tesla, SpaceX, and xAI, pitched as “the biggest chip manufacturing facility in human history.”
The plan? A mind-blowing annual capacity of 1 terawatt of computing power (that’s about 50 times the current global AI compute output), and 100 to 200 billion AI and memory chips per year. Total investment is expected to top $20 billion. The factory will sit right on the border of Texas and Nevada, with Phase 1 targeting a production start by the second half of 2027 and first mass-produced chips hitting the line in 2028.
Musk has said Tesla alone burns through over 100 billion chips per year, and if Optimus ever hits 1 billion units annually, chip demand could skyrocket to 50 times the current auto business. But global wafer fabs today can only cover about 2% of Tesla’s needs. “We either build TERAFAB, or there are no chips. We need chips, so we build TERAFAB,” Musk explained.
Sounds grand, right? But turning TERAFAB from a blueprint into a real factory pumping out chips is no walk in the park—it’s up against massive operational, talent, and time hurdles.
Kuo’s report points out that TERAFAB is trying to do something never seen before in the semiconductor world: juggle partnerships with three process giants—TSMC, Samsung, and Intel—all at the same time, while running six chip projects in parallel (AI, Dojo, SpaceX-specific, etc.), covering both ground-edge computing and space-grade lines. And it aims to vertically integrate mask design, logic, memory, and advanced packaging. The design cycle? Just 9 months—way faster than the industry norm of 18–24 months (or 2–3 years for complex designs). It’s like running a marathon at sprint speed.
But the clock is ticking. The Intel 14A advanced process that TERAFAB picked won’t have its core PDK 0.9 design kit open to external customers until October 2026—that’s the first time TERAFAB will actually get its hands on the design tools. Kuo stresses that if they can’t master the tech quickly enough within that window, they’ll miss the 2028 small-volume production milestone, or even risk falling a whole process generation behind. To buy time, TERAFAB is already paying significantly above market rates for key equipment—basically throwing cash at speed, which shows just how tight the timeline really is.
The biggest weak spot? People. Kuo compared the top IC design teams globally and found that Apple’s Silicon Engineering Group (SEG) has several to dozens of times more engineers than SpaceX and Tesla’s chip teams combined. Yet the latter has to take on a much wider, more complex chip R&D and manufacturing mission in a shorter timeframe.
In Kuo’s view, TERAFAB’s real challenge comes down to executing efficiently under all these constraints. The only practical way out? Bring in an ASIC partner that already knows how to make advanced processes work on the ground.
Among global candidates, MediaTek stands out as the partner that “can match TERAFAB’s technology, resources, and pace,” according to Kuo. Its edge comes down to three big things. First, MediaTek has real-world experience with Intel’s ecosystem—it’s one of the few companies that has both taped out on Intel 16 and worked with EMIB-T advanced packaging. That means it can quickly jump onto 14A and help TERAFAB grab that golden adaptation window after PDK 0.9 drops, avoiding any tech lag.
Second, MediaTek’s TPU collaboration with Google proves it can handle high-end AI chip co-development and mass production. Kuo’s report shows that the TPU 8t (the fruit of that partnership) is slated for volume production in Q4 2026, and Google’s next-gen TPU, codenamed Humufish, follows in H2 2027—both ahead of schedule. That shows MediaTek knows Semi-COT collaboration models, advanced packaging coordination, and first-tier mass production management—exactly the core capabilities TERAFAB needs most right now.
And here’s the hidden bonus: the accelerated R&D DNA of Taiwan’s semiconductor ecosystem that MediaTek brings along. TSMC’s “Nighthawk program” (24/7 shift-based R&D) was a key efficiency booster—even South Korean politicians and semiconductor execs have called for copying it. MediaTek doesn’t just have that mindset itself; it can channel the entire Taiwanese ecosystem’s R&D, manufacturing, packaging, and testing resources into TERAFAB. Apple’s supply chain already proved this model works—a U.S. upstream materials supplier set up a lab in Taiwan to replicate the Nighthawk approach just to match Apple’s pace, and it paid off.
If the two sides team up, they could build a cross-timezone R&D handoff system between the U.S. and Taiwan, working around the clock on 14A process deployment, compressing iteration cycles to fit TERAFAB’s breakneck delivery demands.
One more thing: MediaTek is already a core supplier for SpaceX’s Starlink—its MT7629, MT7762/61 series chips have been powering Starlink terminals for years. So the two sides won’t have to waste time figuring out how to work together.
Gartner analysts say the TERAFAB project could push computing resources to be allocated more efficiently across different scenarios, offering a new paradigm for blending AI and aerospace. Sure, the challenges are huge, but if it works, it could seriously boost the resilience and diversity of the global chip industry.
