ByteDance Responds: No Plans to Enter Smart Driving Business
On July 13, according to the Science and Technology Innovation Board Daily, recent media reports claimed ByteDance is exploring autonomous driving, specifically for unmanned logistics under its Volcanic Engine automotive business line. However, ByteDance responded, “We’re deeply exploring AI frontiers, including physical AI, with early-stage research, but we have no plans to develop smart driving technology.”
Meta Expands Louisiana AI Data Center to 5GW, Cumulative Investment Exceeds $50 Billion
On July 13, Meta announced the expansion of its Richland Parish data center in Louisiana to 5GW of computing power, raising cumulative local investment to over $50 billion. This marks a $40 billion increase from the $10 billion plan announced in 2024, making it one of the world’s largest AI infrastructure projects. Meta added that this expansion will allocate over $1 billion for local infrastructure, including roads, water supply, and wastewater treatment.
TSMC Begins Mass Production of 2nm Chips, Google’s New Phone Will Be First to Feature Them
On July 13, reports confirmed that TSMC has started mass production of 2nm chips, with Google as the first customer for smartphone chips. Google is set to launch a new phone in mid-August, a month ahead of Apple.
Jensen Huang Says AI Has No Consciousness: It’s Just Software and Tools, Don’t Anthropomorphize It
On July 13, according to The Paper, NVIDIA CEO Jensen Huang emphasized in a recent interview that we shouldn’t over-humanize AI agents. “They have no consciousness—they’re just tools and software, no different from a robot vacuum or a dishwasher,” he said.
Dongfang Suanxin Launches Software-Defined Near-Memory Computing 3D AI Chip DF1000
On July 13, news broke that Dongfang Suanxin officially released the world’s first high-performance 3D chip, DF1000. This series is built on a fully domestic supply chain, featuring high-performance software-defined near-memory computing architecture.
One of DF1000’s core technologies is software-defined chip design. By using spatial parallelism for task processing and time-division multiplexing of hardware resources, it boosts hardware utilization and reduces dependency on advanced manufacturing processes. The DF1000 delivers 520 TFLOPS of BF16 computing power.
To tackle the “memory wall” challenge common in traditional AI chips, DF1000 uses 3D hybrid bonding technology, stacking wafers to expand memory capacity. Its high-density I/O design provides 6.4 TB/s of memory bandwidth and 900 GB/s of scale-up interconnect bandwidth.
SenseTime Releases and Open-Sources SenseNova-Vision
On July 13, SenseTime officially launched and fully open-sourced the SenseNova-Vision unified vision generation model. The key breakthrough of SenseNova-Vision is making vision a native capability of general foundation models, completely integrated into the large model ecosystem. All classic vision tasks—like object detection, image segmentation, depth prediction, and 3D reconstruction—are now unified natively.
AI Demand Spreads to Mature Processes, TSMC Initiates New Wave of Price Hikes
On July 13, reports indicate that TSMC’s advanced process orders are bursting at the seams, and while it continues to hike prices for 3nm and other advanced nodes, the trend is now spreading to mature processes. Multiple IC design companies revealed they’ve received notices from TSMC about potential price increases for mature nodes. The exact hike varies by company and product line, with final decisions expected in Q4 and implementation likely in January next year.
